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Samsung works on PCIe 5.0 SSDs with 176-layer V-NAND

With current technology and component miniaturization, manufacturers realized that it was difficult to increase density horizontally, which is why they turned to vertically scaling technologies, which is roughly stacking layer after layer. layer to increase density. Samsung pioneered 3D NAND memory, called V-NAND (Vertical NAND), and its development has reached such a point that they already have 1,000 layers in their sights.

Samsung to launch 176-layer V-NAND under PCIe 5.0 this year

Samsung intends to start producing consumer SSDs powered by its seventh-generation V-NAND memory with 176 layers and, according to the company, the smallest NAND memory cells in the industry. The interface of this new flash memory has a data transfer rate of 2,000 MT / s, which allows the manufacturer to build ultra-fast SSDs with PCIe 4.0 and even PCIe 5.0 interfaces.

The drives will use an all-new controller optimized for multitasking with huge workloads, so a successor to the Samsung SSD 980 Pro is expected to demonstrate solid performance in workstation applications.

Eventually, Samsung will introduce data center-grade SSDs based on its new 176-layer V-NAND memory. It is logical to expect that the new drives will offer improved performance and higher capacities to match the next generation of the PCI-Express interface.

They already have 200-layer chips and all 1,000 layers are in the spotlight

While the 176-layer V-NAND chips are already in mass production, Samsung has already built the first samples of its eighth-generation V-NAND with more than 200 layers. The manufacturer says it will start producing this new memory based on market demand; Companies typically introduce new types of NAND devices every 12-18 months, so we could make more or less argued guesses from Samsung’s planned timeline for these 200+ layer chips: late 2022 or early 2023.

NAND chips

There are several challenges Samsung faces in its quest to increase the number of layers. Making NAND cells small (and with thinner layers) requires the use of new materials to reliably store charges, and etching hundreds of layers is also an engineering challenge. Since it is neither feasible nor economical to etch hundreds of layers (build a 1,000-layer 3D NAND wafer in a single pass), manufacturers use techniques such as string stacking, which is also difficult to carry out in large volumes.

Finally, flash memory manufacturers must ensure that their 3D NAND batteries are thin enough to fit into PC and smartphone-oriented devices; As a result, they can’t just increase the number of layers infinitely, although Samsung has already said that it believes 1,000-layer chips are perfectly feasible.

Earlier this year, SK Hynix said it envisioned 3D NAND with more than 600 layers, so Samsung is certainly not the only company with a focus on this. It is impossible to predict when we will see the development of the 1,000-layer V-NAND chips, and it is likely that since manufacturers no longer aspire to double the density each year it will likely take 5 to 10 years to have tangible news about it.