From the Chiphell forums, a user has gotten a unit of the i7-11700K from a Chinese retailer, and the display reveals just how deep Intel has worked into this Rocket Lake-S architecture. Apparently, the memory controller has changed its configuration and now it could show two settings in the purest style of its rival.
Is Intel copying the way Infinity Fabric works with its IMC?
It is early to assure it as such, but everything seems to indicate this. The restructuring of the cores, the iGPU and the main data buses seems to have made a dent in the way in which Intel plans to work with RAM memory from now on and therefore with its BMI.
Specifically, we are talking about the FCLK parameter of the AMD Ryzen, which dictates the frequency of the Infinity Fabric to interconnect the chiplets and with it the cores. As a general rule, this FCLK is synchronized with the UCLK, which is Intel’s IMC but in AMD, and in turn the FCLK is also synchronized with the MEMCLK.
The peculiarity is that this synchronization is called 1: 1, due to its perfect equivalence in frequency, while if we break that synchronization it is usually called 1: 2 or in certain models of 1/2: 1 plates. This mode allows different frequencies between the named settings, pushing one or more of them to the limit if desired, but most of the time it generates a latency that is only compensated if the frequency rise is high or very high.
Well, the new screenshots from the Chiphell forums reveal that in ASUS motherboards for Rocket Lake-S a parameter called CPU IMC: DRAM Clock.
Final BMI velocity appears to have decreased
Until now, Intel had a somewhat stronger BMI than AMD, but it seems that with Rocket Lake-S they have had to lower the level of this, we understand that due to the internal restructuring of the architecture and the new RING.
The first samples claim that the frequency will crash somewhere close to DDR4-3733 MHz in 1: 1 configuration, that is, asynchronously. Currently, waiting for the new AGESA updates by AMD, the average IMCs of the red team make the DDR4-3600 or 1800 MHz in FCLK in 1: 1 configuration, so in principle they would follow behind in this section within of the Ryzen 5000.
But AMD’s goal is to achieve 2000 MHz FCLK to make DDR4-4000 in a short time across all of its drives. Another data that has also been leaked is that Intel for the first time in many years will lose general latency between RAMs and BMI, just what AMD currently suffers and that is gradually reducing with its new CPUs.
So it may be that the difference in performance in gaming is reduced in favor of the red team on that side, but everything indicates that the rise in Intel’s IPC will land in the middle again against its rival.