In theory, it is assumed that these microcode updates were caused by a memory order problem in TSX. A whitepaper suggests that Intel has been aware of the problem since 2018, and although the company launched mitigation measures in October of that same year, it seems that they were not enough, which is why now, three years later, they have decided to launch a new one. update that directly disable TSX. This update was included in the Intel Platform Update 2021.1 when it debuted on June 8.
More Intel CPUs losing TSX and with it, performance
“Workloads benefiting from Intel TSX could experience a performance change” -, Intel said on June 12.- «Some advanced applications for performance monitoring (perfmon) might need a modification in their scripts and data collection methodologies due to microcode updates ».- The company did not provide further information regarding the impact this change has on the performance of its processors.
However, there is good news: Intel said that it does not expect these microcode updates to affect users who do not use the performance monitoring unit, or those who only use updated drivers and PMU tools, although it does recommend that developers of PMU drivers and those for performance tools follow the instructions in the document they have provided. This means that a normal user is unlikely to experience any changes, basically.
Developers have already prepared the Linux kernel for these microcode updates, and it has been noted that patches destined for Linux 5.14 already made that change. However, for Windows users there is still no news, although these changes will surely be implemented in future updates of the operating system.
This microcode update affects the following CPUs:
- All Xeon Skylake CPUs prior to Stepping 5 (including Xeon D and first generation Xeon Scalable).
- All 6th Gen Xeon E3-1500M v5 / E3-1200 v5 CPUs.
- All 7th and 8th generation Core and Pentium CPUs prior to Stepping 0x8.
- All 8th and 9th generation Core and Pentium CPUs prior to Stepping 0xC.
- The TSX instructions are also removed from the 10th generation Comet Lake and Ice Lake processors.
How is the microcode updated?
The microcode of a processor is an organization layer that is inserted between the instructions of the processor and the instructions of the programs, so we are talking about a layer of instructions in very high-level machine code that serve to control the internal functioning of the processor. processor. Initially, when the concept of microcode was created, it was stored in system ROM, but today it is stored in NAND Flash memory.
Therefore, the microcode is not a firmware in itself, it is not something that you can download and install directly, but it usually comes accompanied by updates to the motherboard BIOS and, sometimes (depending on the level of the instructions), in operating system updates; In this regard, it must be taken into account that they are kernel-level updates, so they are usually only included in very large updates.